It is another interesting and information packed seminar. It contains a lot of information about the inner workings of our all “most favorite place and router”. This is much more academic presentation than the recent status update I posted before. Dave goes into much more detail of how nextpnr does the analytical placement, how the router2 works as well as possible performance improvements that channel-driven routing will bring.
A lot of the current effort is targeting bigger and more complex FPGA (Xilinx here we come) and allowing parallelization of the PnR process. But I am sure the existing supported targets will also benefit from some of these new developments.
Dave also presents an interesting request to the community. He would like to see someone take a look into SAT based congestion resolver, this would hopefully help in situations where the router fights over resources and essentially resolves that situation more or less through luck. SAT solver might help speed up the process.
He also highlights that partial reconfiguration is an interesting research direction that is not as well explored by vendor tools and the open tools would lend themselves for further exploration of that topic.
The seminar is followed by a bunch of interesting QnA.
I am sure there is more interesting stuff in this presentation that I did not point out above, but these are the few things that caught my ear.