# FPGA **URL:** https://forum.1bitsquared.com/c/topics/fpga/10.md [Latest](https://forum.1bitsquared.com/latest.md) · [Categories](https://forum.1bitsquared.com/categories.md) --- ## [About the FPGA category](https://forum.1bitsquared.com/t/about-the-fpga-category/109)
**Author:** [@esden](https://forum.1bitsquared.com/u/esden)\ **Replies:** 0
Here you can discuss all things Field Programmable Gate Array (FPGA) related topics. Feel free to show off your digital design projects (IP) and ask questions about FPGA tools. Our community is mostly interested in open… --- ## [Retro Lang on icebreaker 1.0e](https://forum.1bitsquared.com/t/retro-lang-on-icebreaker-1-0e/358)
**Author:** [@jeff](https://forum.1bitsquared.com/u/jeff)\ **Replies:** 1\ **Last updated:** [August 31, 2026, 3:21pm UTC](https://forum.1bitsquared.com/t/retro-lang-on-icebreaker-1-0e/358 "2026-08-31T15:21:55Z")
Hello .. I’m new to icebreaker community I’m working on enjoyable things with FPGA BD.. here is my first video contents from Youtube (May the Force be with you) --- ## [Migrating PLL from HX1K to HX4K](https://forum.1bitsquared.com/t/migrating-pll-from-hx1k-to-hx4k/232)
**Author:** [@simmerj](https://forum.1bitsquared.com/u/simmerj)\ **Replies:** 0\ **Last updated:** [July 31, 2023, 3:42pm UTC](https://forum.1bitsquared.com/t/migrating-pll-from-hx1k-to-hx4k/232 "2023-07-31T15:42:23Z")
I previously made a PLL for a 201MHz clock on my HX1K FPGA, but now I want to migrate my code to the larger HX4K FPGA, but the PLL isn’t working on the new chip. They are both the TQ-144 type chip. My code passes iceSto… --- ## [NewBe Question: Using a Breadboard](https://forum.1bitsquared.com/t/newbe-question-using-a-breadboard/193)
**Author:** [@grossd](https://forum.1bitsquared.com/u/grossd)\ **Replies:** 1\ **Last updated:** [November 22, 2021, 7:11pm UTC](https://forum.1bitsquared.com/t/newbe-question-using-a-breadboard/193 "2021-11-22T19:11:35Z")
Hello, I am new to FPGA and feel particularly interested in the icebreaker given that its open source, including its tool chain. I’d like to use it to write up little projects on a breadboard as well as together with a… --- ## [Video: "UCSC Open-Source Hardware and EDA Seminar: David Shah nextpnr"](https://forum.1bitsquared.com/t/video-ucsc-open-source-hardware-and-eda-seminar-david-shah-nextpnr/144)
**Author:** [@esden](https://forum.1bitsquared.com/u/esden)\ **Replies:** 0\ **Last updated:** [July 20, 2020, 3:12am UTC](https://forum.1bitsquared.com/t/video-ucsc-open-source-hardware-and-eda-seminar-david-shah-nextpnr/144 "2020-07-20T03:12:15Z")
Hey everyone, Thanks to Matt Guthaus for pointing out on Twitter that he invited @daveshah to present a more general introduction to nextpnr earlier in the year. https://youtu.be/dN6rJo43mgc It is another interesting … --- ## [Video: "Yosys and nextpnr - open source FPGA update"](https://forum.1bitsquared.com/t/video-yosys-and-nextpnr-open-source-fpga-update/135)
**Author:** [@esden](https://forum.1bitsquared.com/u/esden)\ **Replies:** 3\ **Last updated:** [July 20, 2020, 2:25am UTC](https://forum.1bitsquared.com/t/video-yosys-and-nextpnr-open-source-fpga-update/135 "2020-07-20T02:25:16Z")
Hey, You all probably already know @daveshah, who is the maintainer of nextpnr and one of the core developers of the open-source FPGA tool ecosystem. Yesterday @daveshah presented an update about the the progress made,… --- ## [Verilog Simulations/Testing](https://forum.1bitsquared.com/t/verilog-simulations-testing/94)
**Author:** [@jcosper](https://forum.1bitsquared.com/u/jcosper)\ **Replies:** 4\ **Last updated:** [April 9, 2020, 4:50am UTC](https://forum.1bitsquared.com/t/verilog-simulations-testing/94 "2020-04-09T04:50:39Z")
Hello all, Finally cracked out my Icebreaker and started playing with it, but quickly wanted to run simulations with an open source tool. Any suggestions? Long ago, I used Icarus and GTKWave, but figured there must be s… --- ## [Generate an in-phase half-speed clock using SB\_PLL40\_2F\_PAD](https://forum.1bitsquared.com/t/generate-an-in-phase-half-speed-clock-using-sb-pll40-2f-pad/89)
**Author:** [@drr](https://forum.1bitsquared.com/u/drr)\ **Replies:** 5\ **Last updated:** [April 4, 2020, 5:25am UTC](https://forum.1bitsquared.com/t/generate-an-in-phase-half-speed-clock-using-sb-pll40-2f-pad/89 "2020-04-04T05:25:59Z")
I have this idea in mind and was hoping people here could pick holes in it or flag any risks, considering I can’t run my designs on a board yet and even if it does work, I want to be certain it’s reliable: 12mhz in to … --- ## [Flash interface issue: sim vs. icebreaker](https://forum.1bitsquared.com/t/flash-interface-issue-sim-vs-icebreaker/91)
**Author:** [@drr](https://forum.1bitsquared.com/u/drr)\ **Replies:** 2\ **Last updated:** [March 29, 2020, 11:18am UTC](https://forum.1bitsquared.com/t/flash-interface-issue-sim-vs-icebreaker/91 "2020-03-29T11:18:00Z")
I’ve got a simple SoC + custom view controller working in both a simulator (Verilator + SDL window) and the icebreaker itself (HDMI PMOD) but the one part that’s not working is the loading the CPU program from flash on r… --- ## [Problems with icepll](https://forum.1bitsquared.com/t/problems-with-icepll/81)
**Author:** [@Qubit](https://forum.1bitsquared.com/u/Qubit)\ **Replies:** 2\ **Last updated:** [February 20, 2020, 1:00am UTC](https://forum.1bitsquared.com/t/problems-with-icepll/81 "2020-02-20T01:00:08Z")
I noticed something strange with icepll: % icepll -i 12 -o 100 F\_PLLIN: 12.000 MHz (given) F\_PLLOUT: 100.000 MHz (requested) F\_PLLOUT: 100.500 MHz (achieved) FEEDBACK: SIMPLE F\_PFD: 12.000 MHz F\_VCO: 804.000 M… --- ## [Problems with PLL](https://forum.1bitsquared.com/t/problems-with-pll/79)
**Author:** [@Qubit](https://forum.1bitsquared.com/u/Qubit)\ **Replies:** 3\ **Last updated:** [February 13, 2020, 2:53am UTC](https://forum.1bitsquared.com/t/problems-with-pll/79 "2020-02-13T02:53:04Z")
I am new to the ICE40, but I have worked with Spartan3 before. I am trying some of the old projects on my ICEBreaker, in particular a digital pattern generator. This design has a slow part that can run with 12 MHz and a … --- ## [Official Win10 instructions missing?](https://forum.1bitsquared.com/t/official-win10-instructions-missing/73)
**Author:** [@okonomi](https://forum.1bitsquared.com/u/okonomi)\ **Replies:** 2\ **Last updated:** [December 28, 2019, 5:00pm UTC](https://forum.1bitsquared.com/t/official-win10-instructions-missing/73 "2019-12-28T17:00:01Z")
Hey everyone, I’m trying to get up and running on Win10 and I’m running into some issues getting everything to work. Some of the recommended tools seem to be Linux only, which is a bit hard to believe, so I’m looking for… --- ## [Blockram timing info?](https://forum.1bitsquared.com/t/blockram-timing-info/74)
**Author:** [@varkenvarken](https://forum.1bitsquared.com/u/varkenvarken)\ **Replies:** 5\ **Last updated:** [December 28, 2019, 8:25am UTC](https://forum.1bitsquared.com/t/blockram-timing-info/74 "2019-12-28T08:25:06Z")
does anyone have a pointer to timing info for the blockrams on the up5k? I think I searched through all the lattice technical notes but it is not there or I might have overlooked it :slight\_smile: the reason I ask is th…